This invention relates to cell processing apparatus, an ATM exchange and a cell discarding method. More particularly, the invention relates to an ATM processing apparatus, ATM exchange and cell discarding method for handling cells compliant with the standard of AAL Type 2 in the field of communications that employs ATM (Asynchronous Transfer Mode).
In ATM communication, the payload of an ATM cell is packed with information and the information is transmitted by sending the ATM cell via an ATM connection set up in advance. More specifically, destination information (VPI/VCI: Virtual Path Identifier/Virtual Channel Identifier) is placed in the header of the ATM cell and the ATM cell is sent to a destination via a predetermined ATM connection in an ATM network in accordance with the VPI/VCI, whereby the information that has been encapsulated in the payload is transmitted.
In the field of mobile communications, data is transmitted upon being converted by compression processing to a data format having a low bit rate in order to utilize the communication bandwidth effectively. When information having such a low bit rate is encapsulated in the payload of a standard ATM cell, filling the payload of one ATM cell with data takes time. This can lead to a delay in the data and to a decline in communications quality. A multiplex transfer scheme referred to as AAL Type 2 has been recommended by ITU-T Recommendation I.363.2 as a scheme that makes possible the transmission of information having a low bit rate with little delay. AAL Type 2 is suited to the transfer of low bit rate information of the kind used in mobile communications networks and is a transfer method that contemplates effective bandwidth utilization with little delay.
FIGS. 54 and 55 are diagrams useful in describing the format of AAL Type 2, and FIG. 56 is a conceptual view of a transfer scheme in accordance with the standard of AAL Type 2. As shown in FIG. 54, a cell having a format that is compliant with AAL Type 2 is composed of a standard cell header and a standard cell payload. A start field STF of one byte and one or more short cells are mapped to the standard cell payload. The start field STF is composed of (1) an offset field OSF that contains a pointer (offset value) indicating the starting position of the initial short cell, (2) a field SN which stores a 1-bit sequence number, and (3) a parity field P.
A short cell is composed of a short-cell header of fixed length and a short-cell payload of variable length. Encapsulated in the short-cell header are (1) a CID (a Channel Identifier of the short cell) for identifying the short-cell connection, (2) an LI (Length Indication) indicating the payload length of the short cell, and (3) user-to-user indication UUI, etc. The above-mentioned information of low bit rate is encapsulated in the payload of the short cell. It should be noted that the LI is the result of subtracting four from the length of the short cell (the length of the short packet).
An AAL2-compliant cell contains a plurality of short cells in multiplexed form. If part of a short cell will not fit in the payload of a single AAL2 cell, the remaining portion of the short cell is mapped to the next AAL2 cell, as shown in FIG. 56. (This is referred to as “overlap”.) The AAL2 cells are then sent to a destination via the predetermined ATM connection in accordance with the VPI/VCI contained in the headers.
In a case where an AAL2 cell is transmitted by an ATM connection, the following problem arises: A plurality of short cells having different CIDs are multiplexed in the payload of the AAL2 cell, as mentioned above. Since an ATM switch performs a switching operation on a per-ATM-cell basis, however, short cells cannot be switched individually and, hence, each short cell cannot be sent to the desired destination.
Accordingly, the ATM switch extracts the plurality of short cells from an AAL2 cell input thereto, generates a plurality of standard ATM cells (referred to as “partially filled cells”) in each payload of which one short cell is planted (see FIG. 57), and performs switching per each partially filled cell, thereby making it possible to realize switching on a per-short-cell basis. A partially filled cell switched by the ATM switch is stored temporarily in a memory provided on the output side of the ATM switch and is restored to the format of an AAL2 cell as appropriate and transmitted over a line. If the partially filled cell resides in memory for an extended period of time in this case, a malfunction occurs because the memory becomes filled to capacity and cannot store newly arriving partially filled cells. In order to utilize the memory effectively and prevent the occurrence of malfunction, therefore, control is necessary to discard partially filled cells resident in memory for too long.
FIG. 58 is a diagram showing a conventional arrangement for implementing such cell discard control. The components include a vacant-address management FIFO 101; an input-data storage memory 102 for storing input data and its data arrival time as well as chain data (not shown) indicating the order (a→b→c) in which the input data arrived; a time counter (timer) 103 for monitoring present time; a register 104 indicating chain starting position; a delay-stipulation-time comparator 105 for comparing the present time and the arrival time to determine whether a delay stipulation time has elapsed; and a register 106 for storing the delay stipulation time.
The vacant-address management FIFO 101 manages vacant addresses of the input-data storage memory 102. The latter accepts a write address WADD from the vacant-address management FIFO 101 and stores input data as well as a time-stamp value (the present time) that is output from the time counter 103. The stored data is connected by the chain data in the order of entry. The delay-stipulation-time comparator 105 periodically (1) calculates the difference between the arrival time of the leading data pointed to by the register 104, which indicates the chain starting position, and the present time output by the time counter 103, (2) compares this difference with a stipulated value that has been set in the register 106, which stores the delay stipulation time, and (3) if the difference exceeds the stipulated value, i.e., if the following relation holds:                (arrival time+delay stipulation time)≦present time commands the discarding of the data on the grounds that the data has been residing in memory for too long, thereby making available the address that stored this data. The cell discarding processing is repeated treating the leading data as the next item of data in the order of input.        
In accordance with ITU-T Recommendation I.363.2, the length of a short packet is such that a variable-length cell having a length of from 4 to 48 bytes is used as a default. However, transmission of information in excess of 48 bytes, up to a maximum length of 67 bytes (a maximum length of 64 bytes for the payload of the short packet) is allowed as an option.
FIGS. 59A and 59B illustrate an example of a short packet the length of which exceeds 48 bytes in the AAL Type 2 format, in which FIG. 59A shows a case in which a 64-byte short packet overlaps two cells and FIG. 59B a case in which the 64-byte short packet overlaps three cells. The OSF (offset) within the STF (start field) provided as the first byte of the ATM cell payload is for the purpose of indicating the position at which the leading edge of the short packet is located. The OSF indicates the number of offset bytes from the STF to the beginning of the leading edge of the short packet.
According to the prior art, it is assumed that the short cell is 48 bytes or less. A separating unit extracts one short cell from the AAL2 cell before the cell enters an ATM switch, converts this to a partially filled cell and inputs each of the partially filled cells to the ATM switch. However, if a short cell exceeds 48 bytes, the fact that the payload length of a partially filled cell (i.e., the payload length of the ATM cell) is only 48 bytes per cell means that the separating unit cannot process a short cell having a length greater than the payload length. In other words, the prior art is such that it is not possible to handle a short cell having a length of 49 to 67 bytes.
In addition to not being able to accommodate input cells having a length greater than 48 bytes, the prior art is such that cell discard processing is executed on a cell-by-cell basis with regard to partially filled cell, making it impossible to discard these cells in units of a plurality of partially filled cells at a time.